DIT DOTS KO6ETZ HAM RADIO • ELECTRONICS • SOFTWARE 14.074 MHz TX PWR RX

Alesis ADAT RMB

Alesis ADAT RMB Reverse Engineering
Reverse-engineering notebook

The Alesis ADAT RMB

A 32-channel Remote Meter Bridge for the original Alesis ADAT, documented far enough to establish its connector topology and controls—but not yet its meter-data encoding. This page separates what the manuals prove, what the evidence suggests, and what must be measured next.

🎚 What This Project Is Building

▥

32 Meter Channels

Four identical DB9 links, each responsible for eight 15-segment displays.

↘

Dual Decay

Fast and slow behavior selected on the RMB and visible to the source adapter.

◆

Three Peak Modes

Momentary, continuous hold, and off—with the hardware bridge authoritative.

⌫

Peak Clear

An event that must be captured reliably even though it has no dedicated pin.

R/I

Track Status

Separate record and input indicators for every track, in addition to level.

≋

Measured Protocol

No UART, RS-232, or RS-422 assumption. Waveform first, decoder second.

The useful breakthrough

The ADAT service manual identifies every DB9 signal and its direction. That narrows the problem from “unknown serial port” to one outbound meter-data signal, three inbound control signals, a 5 V reference, and four grounds.

The present blocker

No source establishes pin 2 timing or framing. A working original blackface ADAT or Fostex RD-8 must be observed before a safe transmitter can be designed.

📐 What the Hardware Tells Us

The RMB is an independently powered 2U display for as many as four original ADAT recorders. One straight-through male-to-male DB9 cable represents eight tracks. Each track has a 15-segment level bar plus separate record and input indicators.

Audio / recorder state

Original ADAT or RD-8 produces level and track status.

RMB local logic

Renders bars, decay, peak state, record and input indicators.

Recorder display

Mirrors the RMB’s selected decay and peak behavior.

Compatibility boundary

  • Original “blackface” ADAT: documented Meter Bridge Out source.
  • Fostex RD-8: reported compatible and suitable as a possible reference transmitter.
  • ADAT XT: omitted the meter output and cannot serve as a direct source.
  • BRC: does not relay meter data; the RMB still connects directly to each recorder.

Power and cabling

The bridge has its own universal 90–250 VAC, 50/60 Hz supply and is specified at 50 W maximum. Pin 1 is therefore an interface reference used by opto-isolators, not evidence that an ADAT powers the entire bridge. Alesis specifies shielded straight-through DB9 cables and describes long runs of 100 feet or more as possible.

🔌 The Documented DB9 Interface

Alesis ADAT to RMB DB9 signal diagram ADAT sends a 5 volt reference on pin 1 and meter data on pin 2. RMB returns Fast Slow on pin 3, Peak Momentary on pin 4, and Peak Hold on pin 5. Pins 6 through 9 are ground. Original ADAT Meter Bridge Out RMB one of four 8-track ports pin 1 · +5 V opto reference pin 2 · buffered meter data pin 3 · F/S pin 4 · PM pin 5 · PH pins 6–9 · PCB ground

Directions are relative to the ADAT. The RMB sends its local control selections back to every attached recorder.

PinDirection at ADATLabelFunctionConfidence
1Output+5 VReference voltage for RMB opto-isolatorsConfirmed
2OutputMeter dataBuffered display information to RMBConfirmed
3InputF/SFast / Slow selection from RMBConfirmed
4InputPMPeak Momentary selection from RMBConfirmed
5InputPHPeak Hold selection from RMBConfirmed
6–9CommonGroundPCB groundConfirmed
Shell—UnknownShield/chassis relationship requires continuity testingOpen

The service manual contains an apparent connector typo

The paragraph first names J2 as the RMB connector, then places control pins 3–5 on J3. Its next paragraph identifies J3/J4 as Sync Out/In. Context strongly indicates that the control sentence means J2, but continuity or a live capture must still verify it.

Do not connect a PC serial adapter

This topology is neither RS-232 nor differential RS-422. Bipolar RS-232 levels can damage 5 V circuitry, and the DB9 shell does not make the protocol standard.

🎛 Decay, Peak Modes, and Peak Clear

The RMB owns these display behaviors locally and tells connected ADATs to mirror them. The eventual source adapter must therefore send meter/status data and treat the RMB’s return lines as semantic state—not expose raw pin polarity to application code.

Behavior model

Decay
Peak indication

Illustration only. This model demonstrates the required behavior; it is not a pin-2 protocol emulator. Momentary peaks expire after roughly two seconds. Continuous peaks remain until cleared. Peak Clear is enabled only in Continuous mode.

ControlVisible behaviorReturn pathWire semantics
Fast decayBars fall quicklyF/S, pin 3Polarity unknown
Slow decayBars fall more graduallyF/S, pin 3Polarity unknown
Momentary peakPeak remains about two secondsPM/PH, pins 4–5Encoding inferred
Continuous peakPeak remains until clear or mode changePM/PH, pins 4–5Encoding inferred
Peak offNo peak indicationPM/PH, pins 4–5Encoding inferred
Peak ClearClears held peaks in Continuous modeNo dedicated pin documentedEvent unknown

The likely mode encoding

The simplest model is PM asserted for Momentary, PH asserted for Continuous/Hold, and neither asserted for Off. Both asserted may be unused. That is a testable inference, not a fact.

Peak Clear is the control trap

There is no fourth return wire, yet the manual says Peak Clear also clears the attached ADAT’s display. It must therefore appear as a transition on PM/PH, a temporary mode change, or another behavior on pins 3–5. All three lines must be captured simultaneously around the button press.

🧪 Protocol: Facts Before a Decoder

Pin 2 carries buffered meter-display information, but no examined manual states its voltage thresholds, idle level, symbol rate, frame structure, bit order, or update cadence. The right first question is what the waveform is—not which UART baud rate makes it look plausible.

H1 · Repeated full frame

Each update may contain all eight tracks.

Falsified if traffic occurs only when values change.

H2 · Status in each track field

Level, record, and input may travel together.

Falsified if flags alter another frame or channel.

H3 · Quantized level code

The 15-segment height may be sent as a compact value.

Falsified by direct 15-bit segment masks.

H4 · Static PM/PH state

PM and PH may be mutually exclusive mode signals.

Falsified by pulses, both asserted, or another Off code.

H5 · Clear as a control edge

Peak Clear may briefly change PM or PH.

Falsified if pins 3–5 remain unchanged.

H6 · Instantaneous meter values

The RMB may apply all decay and peak processing itself.

Falsified if pin-2 values visibly decay or hold after input drops.

What a valid decoder must explain

  • eight independent levels and all 15 visible steps;
  • record and input state for each track;
  • a repeatable synchronization rule and channel order;
  • steady silence, abrupt level steps, startup, and mode changes;
  • captures from more than one physical recorder where possible.

Firmware evidence has a limit

An ADAT v3.05 27C512 image contains valid 8051-family code, but the service manual assigns display work to a VU ASIC. Firmware analysis may reveal register writes or mode handling without exposing the pin-2 serializer itself.

🔬 The Bench Plan

The shortest route is passive observation of one working eight-track link. Four-port replication comes only after the first link is electrically and logically understood.

Stage 0 · next

Unpowered continuity and resistance

Verify the straight-through cable, confirm pins 6–9, map shell/chassis relationships, compare all four ports, and record hardware revisions.

Stage 1 · next

Powered electrical baseline

With high-impedance scope probes only, measure pin 1, pin 2 idle and swing, control-line levels, edge rates, startup, and power-order behavior.

Stage 2 · required for controls

Capture the control truth table

Record pins 3–5 together through Fast, Slow, all peak modes, Peak Clear with and without a held peak, and a power cycle.

Stage 3

Controlled pin-2 captures

Collect startup, silence, every visible channel-1 level, channels 2 and 8, unequal two-channel states, step-down, record, input, mode-cycle, and Peak Clear cases.

Stage 4

Infer and falsify a frame model

Require one decoder to explain every capture. Reject hand-picked offsets, one-channel coincidences, and framing that cannot resynchronize.

Stage 5

Protected one-port transmitter

Use replaceable buffering, measured thresholds, current limiting, test points, and independent control inputs. Validate static bars before dynamic audio.

Controlled capture set

Meter-data captures

powerup, silence, ch1-levels, ch2-levels, ch8-levels, two-channels, and step-down isolate framing, ordering, and decay ownership.

Status and control captures

record-status, input-status, mode-cycle, and peak-clear isolate non-level fields and correlate the three return lines with visible behavior.

Capture metadata

Every file records recorder model and firmware, sample rate, transport state, stimulus level/frequency, RMB mode, instrument thresholds/sample rate, timestamp, visible result, and SHA-256 hash.

Observation comes before drive

No USB serial adapter, logic output, or bench supply should drive the RMB connector during the observation stages. Confirm analyzer voltage tolerance after measuring the waveform on a scope.

🧩 Intended Adapter Boundary

Audio / source state

32 instantaneous levels plus record/input flags.

Protocol engine

Measured framing, deterministic timing, four 8-track streams.

RMB

Local decay, peak modes, clear event, persistent user selection.

The initial design should treat the bridge as authoritative for visible decay and peak behavior. The host can mirror those selections, but it should not pre-apply decay or peak hold unless step-down captures prove that the RMB expects preprocessed values.

Software conceptMeaningHardware source
DecayModeFast | SlowDecoded pin 3 state
PeakModeMomentary | Continuous | OffDecoded pins 4–5 state
PeakClearEdge/event, never a polled levelMeasured transition on control returns
TrackState[32]Instantaneous level, record, inputHost/audio source

Hardware design remains intentionally open

The MCU, buffer family, threshold network, isolation, and ground strategy depend on measurements still missing. The first PCB should expose pins 1–5 and each ground domain as test points and avoid tying signal ground, USB shield, chassis, and protective earth together by assumption.

📍 Where It Stands

Research status as of 16 October 2026.

PartStatusWhat is known / needed
Product identity and compatibilityDocumentedOriginal blackface ADAT; four eight-track links; XT omitted the output.
DB9 pin assignmentDocumentedOne data signal, three control returns, +5 V reference, four grounds.
Decay and peak behaviorDocumentedFast/Slow; Momentary/Continuous/Off; Peak Clear in Continuous.
Control-line polarity and event shapeCapture neededMeasure pins 3–5 through every local button sequence.
Pin-2 electrical interfaceCapture neededIdle level, swing, impedance, edges, and output topology unknown.
Meter-data framingUnknownNo baud rate, timing, synchronization, or bit map established.
One-port transmitterBlockedUnsafe to implement before electrical and framing captures.
Four-port 32-channel sourcePlannedReplicate only after one link survives bench validation.

📚 Sources and Evidence Policy

Primary manufacturer documentation carries the most weight. Secondary sources are used only for corroboration or to record earlier speculation. Original manuals and firmware are not republished by this project; the repository contains our analysis, links, hashes, diagrams, and plans.

Evidence labels used here

Confirmed means stated by manufacturer documentation or directly measured. Inferred means the simplest testable explanation consistent with confirmed evidence. Open means unresolved and unsafe to assume.

Alesis ADAT RMB reverse-engineering project · original analysis and diagrams · source documents remain with their respective owners.

↑